Principal Engineer, Hardware & Silicon Validation

the opportunity to contribute to several areas of product development and validation including functional, electrical, and system stress. Additional contribution opportunities include the development of SW, test plans, and utilities to enable customer platforms. The Post-Silicon Validation team develops solutions and validates a range of IO interfaces and functions on multi-core ARM processors including Ethernet, RFOE, and PCIe.

- Integrate and support PCIe/Ethernet initialization Firmware within Marvell's SDK. - Use diagnostic tools to debug the IO interface - Develop and execute validation test plan - Validate PCIe/Ethernet interface and features on new SOCs. - Develop software and FW solutions - Support bring-up activities and PCIe/Ethernet initialization development for new products.

- Bachelor's degree in Computer Science, Electrical Engineering or related fields and 10-15 years of related professional experience. OR Master's degree and/or PhD in Computer Science, Electrical Engineering or related fields with 5-10 years of experience. - Experience with high-speed interfaces (e.g., PCIe Gen5/Gen6, 100G/200G Ethernet) - Proven hands-on expertise in debugging complex hardware/software interactions - Solid experience in test development, validation, and execution at system or silicon level - Familiarity with bring-up of new SoCs and low-level initialization flows - Proficiency in C/C++ and embedded firmware development - Experience using lab equipment (e.g., oscilloscopes, protocol analyzers, traffic generators) for debug and validation - Strong analytical and problem-solving skills with a focus on root cause analysis

- Familiarity with Firmware or similar networking/SoC platforms - Automation and scripting experience (Python, shell, etc.) for test and debug