RTL Design Engineer (Silicon Engineering)

We are seeking a motivated, proactive, and intellectually curious engineer who will work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design, validation, product engineering, ASIC implementation). In this role, you will be developing cutting-edge next-generation FPGAs and ASICs for deployment in space and ground infrastructures around the globe.

These chips are enabling connectivity in places it has previously not been available, affordable or reliable. Your efforts will help deliver cutting-edge solutions that will expand the performance and capabilities of the Starlink network.

- Design ASICs and/or FPGAs for Starlink projects, implementing IP for complex SoCs and participate in integration tasks using Verilog/SystemVerilog

- Participate in the full ASIC/FPGA design lifecycle for Starlink projects, from high-level conceptual and architectural discussions through microarchitecture, design partitioning, and collaboration with backend/implementation teams, and assist in lab bring-up and validation

- Engage in high-level architectural design for FPGA and ASICs

- Collaborate with cross-functional engineers in developing new technologies for the Starlink program impacting User terminals, Satellites, and more

- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or Physics

- 1+ years of experience in RTL Design using SystemVerilog, Verilog or VHDL

- Master's in Electrical/Computer Engineering or related field

- Experience in designing DSP or digital communication system datapath blocks

- Ability to work in a dynamic environment with changing needs and requirements

- Team-player, can-do attitude and ability to work well in a group environment while still contributing on an individual basis

- Demonstrated ability to work in a highly cross-functional role

- Ability to work extended hours or weekends as needed for mission critical deadlines

ASIC Design Engineer/Level I: $125,000.00 - $145,000.00/per year ASIC Design Engineer/Level II: $145,000.00 - $195,000.00/per year

Base salary is just one part of your total rewards package at SpaceX. You may also be eligible for long-term incentives, in the form of company stock, stock options, or long-term cash awards, as well as potential discretionary bonuses and the ability to purchase additional stock at a discount through an Employee Stock Purchase Plan.

You will also receive access to comprehensive medical, vision, and dental coverage, access to a 401(k) retirement plan, short & long-term disability insurance, life insurance, paid parental leave, and various other discounts and perks. You may also accrue 3 weeks of paid vacation & will be eligible for 10 or more paid holidays per year.

Exempt employees are eligible for 5 days of sick leave per year.