Senior Mask Design Engineer - Hardware

- You'll collaborate cross functionally with package technical lead (PTL) and I/O signal integrity and technology engineers to deliver solution for product packages in tight schedule.

- Performing physical layout for silicon interposer using Cadence tools.

- Conduct design feasibility studies to evaluate the package design goals for size, cost, and system performance.

- Take part in studying layout floorplan and perform custom layout and verification against design rules and netlists.

- Propose layout design trade-offs to the PTL for resolution and implementation.

- Hold a B.S. Electrical Engineering or equivalent experience

- Minimum of 5+ years proven experience in Mask and Layout Design.

- Deep understanding of layout concepts in submicron CMOS technologies.

- You are an authority with Cadence layout tools - particularly Virtuoso.

- Experience running and debugging with verification tools such as Calibre, ICV, Thunder, etc.

- Proficient in scripting languages like Perl, Python, Skill, etc.

- Should have knowledge of DRC and LVS checking flows, ability to customize decks.

- You can work optimally in a team, good interpersonal skills, passion and positive energy.

NVIDIA is widely considered to be one of the technology world's most desirable employers! We have some of the most forward-thinking and dedicated people in the world working for us. If you're creative and autonomous, we want to hear from you

Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 136,000 USD - 212,750 USD for Level 3, and 168,000 USD - 258,750 USD for Level 4.

Applications for this job will be accepted at least until August 10, 2026.