Analog Modeling/Verification Senior Staff Engineer

We are seeking talented individuals to work on solving technical challenges with the most outstanding group of collaborators in the industry. Join our team of experts and make a difference in an exciting career opportunity.

Responsible for - Creating Verilog/SystemVerilog behavioral models of analog circuits. - Creating programming sequences to verify analog circuit behaviors. - Providing support to analog model users for model bring up. - AMS simulations to verify leaf cell functionality.

MS in Computer/Electrical Engineering with 5+ years of relevant industry experience. Solid experience in the followings: - Good understanding of CMOS analog design circuit. - Verilog/SystemVerilog modeling of functional behaviors of analog circuits. - Using EDA tools, such as Cadence Virtuoso. - Hands-on experience of using Cadence tools to verify mixed signal designs. - Basic scripting language skills, such Python. - Good communication skills to interact with other design teams.