Senior Principal Memory Architect

- Bachelor's degree in Electrical Engineering, Computer Engineering, or related field and 15+ years of relevant experience, or - Master's/PhD with 8+ years of experience in memory architecture or system design.

- Deep understanding of DDR/HBM memory subsystem architecture for data center compute, AI, or XPU systems. - Proven experience designing or specifying HBM/DDR memory controllers and associated subsystems. - Strong familiarity with JEDEC standards (HBM 3/4 , DDR4/5, LPDDR5/5X/6) and related memory interface technologies. - Experience with system modeling and performance analysis tools for evaluating memory system trade-offs. - Demonstrated experience developing ECC, RAS, and reliability features for server or high-performance SoC designs.

- Strong analytical and conceptual thinking with a track record of innovation. - Excellent communication skills and the ability to collaborate effectively across global, multi-disciplinary teams. - Passion for architecting memory solutions that redefine performance and efficiency in data center computing