Senior Staff Emulation Engineer

Requirements: - BS in Computer Engineering, Electrical Engineering, or Computer Science with 5-7 years of emulation experience (or MS/PhD with 3-5 years of experience). - Experience with SystemVerilog and UVM. - Extensive knowledge of emulation platform offerings from leading vendors such as Synopsys, Cadence, and Siemens, with deep experience in building complex SoC and Subsystem emulation models. - Hands-on experience developing emulation models using platforms from Synopsys, Cadence, and Siemens is required. - Proficient in emulation bring-up, including reset sequence execution and firmware bring-up. - Strong working knowledge in one or more of the following areas: processor architecture, SoC components, interconnect buses, I/O protocols (PCIe, CXL, Ethernet), and memory interface technologies (DDR, HBM). - Skilled in scripting languages such as Perl, Python, Tcl, and UNIX shell. - Proven ability to define emulation strategy and platform requirements, develop emulation test plans, and drive verification execution for large-scale products on platforms such as Veloce, ZeBu, and Palladium. - Good programming skills, especially in C++ and ARM assembly.

Other Skills: - Diligent, detail-oriented, and able to take initiative and handle assignments with minimal supervision. - Able to work effectively with differing opinions and collaborate constructively. - Open-minded and adaptable; not rigid in approach or thinking. - Able to learn quickly and operate in a fast-paced environment.