Design Automation Engineer (TFM/EDA)

At Intel Foundry Automation - Government Programs, we believe in empowering our employees with the tools and opportunities to excel, grow, and make a real impact. If you're a seasoned Silicon Design Automation Engineer with proficiency in Design TFM (Tools, Flows, Methodology) and EDA tools support for Intel's PDK (Process Development Kit) for external Foundry customers, we want you on our team.

About This Role: This role encompasses installation, maintenance, and technical support of design environment (automation scripts, front-end and back-end design tools, flows, processes, and licenses) as well as compute environment (storage, compute, netbatch, ION, etc.). You will also provide technical support for Intel PDK and collateral.

- Resolve designer's tool / methodology issues on the path to TapeOut.

- Provide support for design ramp up through training / documentation.

- Interact with EDA providers and ensure required tools features are available for the projects with high quality.

- Closely partner with PDK/library experts, flow development teams, as well as with product design teams

- Collaborate with EC to provision adequate compute capacity and help debug any associated issues.

- Create automation (scripts, checkers, etc.) for installation of design environment (PDKs, EDA tools, licenses, etc.) to simplify and accelerate design processes.

- Support the integration of new tools and methods into existing design workflows, ensuring seamless adoption and scalability.

- Excellent communication, networking, presentation skills and pursuing highest quality standards.

- Ability to obtain a US Government Security Clearance TS /SCI.

- BS in Electrical or Computer Engineering with 4+ years' experience or MS in Electrical or Computer Engineering with 2+ years' experience in front-end and back-end design tools and flows.

- Experience in EDA tools and methodologies, including debugging and problem-solving.

- Experience in physical design, optimization, and tools flows and methodology (TFM).

- Familiarity with Verilog/ VHDL - Tcl, Perl, Python scripting.

- Hands-on experience of industry standard front-end and back-end EDA tool installs.

- Experience in installation of foundry PDK and flows (Cheetah, etc.)

Additional Locations: US, Arizona, Phoenix, US, California, Santa Clara, US, Oregon, Hillsboro

Annual Salary Range for jobs which could be performed in the US: $117,620.00-227,270.00 USD

Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.