Marvell Technology

Distinguished Engineer - Digital Design

- San Diego, CA
✓ Verified live on the employer's own system · added 64 days ago
Save search
Senior · 10+ yrs exp

Requirements

Education: Bachelor's degree or related field

Experience: 10+ years

Skills & tools

EmbeddedTeam LeadershipTroubleshootingProject ManagementManagementElectricalIc DesignFrontend Dev

Benefits — mentioned in this posting

Equity / stockHealth, dental & vision
Apply on company site ↗ See your fit → free

Full job description

Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities.

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.

Join Marvell's Custom Compute Solutions Business Unit (CCSBU) as we establish our design presence in San Diego's thriving semiconductor ecosystem.

This team will be responsible for delivering high‑quality customer silicon for advanced AI, XPU, and XPU‑Attach programs. By partnering closely with customers and internal stakeholders, the design center will enable Marvell’s most strategic and financially significant custom SoC initiatives, delivering differentiated solutions that reinforce Marvell’s position as a trusted partner for next‑generation compute platforms.

This is a rare technical leadership opportunity - you'll help shape design strategy from the ground up and build a world-class team as part of our strategic expansion into Southern California. You're not joining an established local team - you're building one. You'll define the culture, establish the methodology, and shape the technical DNA of Marvell's San Diego design organization.

  • Write specifications and define micro-architecture of the design
  • Collaborate with the verification team on the verification test plan, coverage analysis, and full-chip simulation plus debug
  • Write SVA assertions for dynamic simulation and apply them in formal verification
  • Work with the physical design team in aiding the implementation of the functional blocks
  • Interact with the project manager to scope and assign tasks
  • Provide reasonable and accurate schedule estimates and follow through to meet them in spite of surprises
  • Proactively communicate challenges and provide contingency plan recommendations to management
  • Work with multiple design centers and design groups to shape future methodology
  • Support the post silicon team to bring up silicon in the lab
  • Work with the software team to ensure product meets customer use cases
  • Provide expert product support in post-silicon debug environments

Bachelor’s degree in Computer Science, Electrical Engineering or related fields and 17+ years of related professional experience. Or Master’s degree in Computer Science, Electrical Engineering or related fields with 12-15+ years of experience. Or PhD in Computer Science, Electrical Engineering or related fields with 10-12+ years of experience.

To be successful in this role you will need the following skills:

  • Familiar with modern SoC architectures and various interface technologies such as AXI, DDR, Ethernet, PCIe.
  • Experience in micro-architecture of complex custom/ASIC products involving Chip I/O, shared memory, and embedded processors
  • RTL design experience, synthesis, static-timing closure, formal verification, gate-level simulations, and block-level functional verification.
  • Experience in designing high speed (>1 GHz)/high-performance embedded processor SOC products is a plus.
  • Experience in implementation/timing closure for high speed design.
  • Hands-on experience for all aspects of chip-development process with proficiency in front-end design tools and methodologies.
  • Ability to create SVA assertions and apply formal verification concepts and tools
  • Ability to come up with creative and innovative solutions, and display technical leadership from within a team of engineers
  • Ability to work efficiently and influentially with team members across multiple sites
  • Enthusiastic about exploring and applying new methods, tools, and process efficiency to ASIC design flow
  • Knowledge of scripting languages such as Python, Perl, Tcl, and UNIX shell is desirable.
Expected Base Pay Range (USD) 212,200 - 314,020, $ per annum

The successful candidate’s starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.

Additional Compensation and Benefit Elements Marvell is committed to providing exceptional, comprehensive benefits that support our employees at every stage - from internship to retirement and through life’s most important moments. Our offerings are built around four key pillars: financial well-being, family support, mental and physical health, and recognition.

Highlights include an employee stock purchase plan with a 2-year look back, family support programs to help balance work and home life, robust mental health resources to prioritize emotional well-being, and a recognition and service awards to celebrate contributions and milestones. We look forward to sharing more with you during the interview process.

More jobs at Marvell Technology

Similar jobs near - San Diego, CA

Tell me when more Distinguished Engineer, Power Architecture jobs post near - San Diego, CA We re-check every listing against the employer’s own board — no résumé needed.

Search Distinguished Engineer - Digital Design jobs near - San Diego, CA → Browse all live jobs

This posting was published by Marvell Technology on their own careers system and is shown here with a direct link to apply there. Employers: for corrections or removal, contact jobs@veritahire.com.