Analog & DevOps ATE Test Engineer

We are looking for a seasoned Analog & DevOps ATE Test Engineer to own the development, validation, and productization of test solutions for our mixed-signal products. You will serve as a technical anchor across wafer probe, final test, characterization, and qualification, while simultaneously driving the modernization of our test development infrastructure through DevOps practices and automation.

You will collaborate closely with cross-functional teams, including design, product, and process engineering, to ensure robust test coverage, high yield, and smooth integration into high-volume manufacturing. This is a highly technical and impactful role suited for an engineer who thrives in a fast-paced, innovation-driven environment that combines test code development with scalable automation and improved software quality.

- Develop, validate, and release test programs for wafer probe and final test on the Advantest V93000 SmartScale platform using SmarTest 8, with automotive-grade requirements.

- Drive DFT/DFM implementation for new products in partnership with design and test architects to maximize coverage efficiency and minimize test time.

- Design and maintain CI/CD pipelines for test program development, regression testing, and release.

- Maintain a centralized test IP/reuse library (code, limit tables, utilities) with disciplined version control using Git-based workflows.

- Build and enforce automated test program audit tools that validate coverage completeness, limit table integrity, naming conventions, and hardware resource utilization.

- Contribute to and help standardize test infrastructure tooling (Docker-based environments, scripted deployment, platform abstraction layers) to reduce setup friction across the team.

- Champion code quality practices, including code reviews, unit testing of test utilities, and documentation standards.

- Deep, production-proven experience with the Advantest V93000 / SmarTest 8 platform.

- Strong understanding of analog design and measurement techniques for analog and/or RF designs.

- Exposure to post-silicon validation, silicon bring-up, debugging, root cause analysis, product engineering, and foundry interaction.

- Hands-on experience building CI/CD pipelines (e.g., Jenkins, GitLab CI, or equivalent) for test program validation and release.

- Proficiency with Git and structured branching/release workflows in a collaborative development environment.