Emulation Engineer, Technical Leader

The application window is expected to close on: 09/30/2026 Job posting may be removed earlier if the position is filled or if a sufficient number of applications are received .

This is an onsite role and will require working out of the Milpitas/San Jose office location.

The Common Hardware Group (CHG) creates innovative hardware platforms central to the AI era, powering Cisco's core Switching, Routing, and Wireless products for organizations globally. Our innovations in silicon, optics, and hardware platforms—like Silicon One—are shaping the technology industry. We're a global team of creative experts, bringing our unique backgrounds and bold ideas to push boundaries and help each other grow.

Because full product development—from design to qualification to production—is within our team, we're able to think differently, experiment more, and work quickly. Join us to power the future of the digital world.

You will work with Cisco’s best-in-class switching solution team. Our team is responsible for driving integration of the Nexus systems and ACI with software, including OpenStack, Docker, and Open vSwitch, to help our customers build multi-tenant clouds.

• Develop innovative emulation environments that will be used to evaluate the performance and functionality of multi-terabit systems.

• As a team member, work closely with the design, DV, power, and post-silicon diagnostic teams.

• Assist with test plan design, test implementation, and debugging during the pre-silicon emulation process.

• Develop tests to generate complex traffic, and performance scenarios to catch potential post-Silicon issues during the Pre-Silicon phase.

• Bachelor’s or Master’s degree in EE (Electrical & Electronics) or CE (Computer Engineering) with 8+ years of relevant experience.

• Prior emulation experience on platforms such as Palladium, Veloce, or Zebu as well as experience with compilation, debug, performance testing.

• Prior experience with RTL development for Emulation prototypes.

• Prior experience with C/C++ and TCL infrastructure development.

• Prior experience with System debug tools like gdb, waveform debuggers.

• Experience with scripting programs (e.g., Python, Perl or similar)

• Post Silicon functional validation or debugging experience is a plus.

• Experience with protocols e.g. PCie, I2C, Ethernet packet headers, Ethernet protocol is preferred.

The starting salary range posted for this position is $186,900.00 to $267,700.00 and reflects the projected salary range for new hires in this position in U.S. and/or Canada locations, not including incentive compensation*, equity, or benefits.