SOC Design Verification Engineer - Data Center Solutions

We are seeking highly motivated and experienced Design Verification Engineers to join our Data Center SoC Verification team. In this role, you will be responsible for verifying next-generation Data Center SoCs that power AI, high-performance computing, and cloud infrastructure products. You will work closely with architects, design engineers, software teams, and verification specialists to develop scalable verification solutions, drive verification closure, and ensure first-silicon success for complex SoC designs.

This position offers the opportunity to work on cutting-edge technologies including multi-core CPUs, cache coherency systems, memory subsystems, AI/ML accelerators, high-speed interconnects, security, and advanced SoC architecture.

* Develop and execute comprehensive verification plans for SoC, subsystem, and IP-level features.

* Design and implement scalable System Verilog/UVM-based and Processor-based verification environments.

* Create directed and constrained-random test scenarios to validate functionality and architectural use cases.

* Develop assertions, functional coverage models, and checkers.

* Debug RTL, testbench, and integration issues and work closely with design teams to resolve defects.

* Drive coverage closure using functional and code coverage metrics.

* Participate in architecture and design reviews to ensure verification requirements are incorporated early in the development cycle.

* Support emulation and acceleration-based verification when required.

* Contribute to methodology improvements, automation, reusable verification components, and AI-assisted verification flows.

* Bachelor's or master's degree in electrical engineering, Computer Engineering, Computer Science, or related field.

* Minimum 2+ years of design verification experience* Senior positions to be offered to candidates with proven expertise in the relevant field

* Strong knowledge of: System Verilog, UVM, C, Assertion-Based Verification (SVA), Coverage-Driven Verification, System level Use case verification

* Experience developing verification environments from architecture/specification through signoff.

* Strong understanding of computer architecture and digital design fundamentals.

* Proficiency in Python or scripting languages for automation.

* AI-assisted verification of workflows and test generation.

* Experience in full-chip or subsystem verification environments.

The ideal candidate is a hands-on verification engineer who is passionate about solving complex technical challenges and delivering high-quality silicon. They should possess strong debugging skills, a solid understanding of SoC architecture, and the ability to thrive in a fast-paced, collaborative environment.

You will be part of a team developing next-generation Data Center Solutions -

Qualcomm Dragonfly CPU, Qualcomm High Bandwidth Compute (HBC), Qualcomm Dragonfly AI Inference Accelerator. This involves hardware design verification of advanced CPUs, Memory architecture, AI Accelerators, and high-speed connectivity technologies. This role offers significant growth opportunities while working alongside industry-leading engineers on some of the most challenging SoC verification problems in the semiconductor industry.

- Bachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.

Master's degree in Science, Engineering, or related field and 1+ year of ASIC design, verification, validation, integration, or related work experience.